@inproceedings{440d431b1a9b493aa6a798654baa5e8b,
title = "Yield enhancement for WSI array processors using two-and-half-track switches",
abstract = "The enhancement of fabrication yield for arrays of large numbers of processors is considered. An array grid model based on two-and-half-track switches is adopted. It is shown that two-and-half-track switches, possessing much better reconfigurability capability than that of one-and-half-track switches, are more suitable for yield enhancement. Moreover, it is possible to develop a reconfiguration algorithm based on the one-and-half-track reconfiguration algorithm. The algorithm can effectively deal with faults on the switches, wires, and connections.",
author = "Jean, {J. S.N.} and Fu, {H. C.} and Kung, {S. Y.}",
year = "1990",
language = "English (US)",
isbn = "0818690135",
series = "1990 Proc Int Conf Wafer Scale Integr",
publisher = "Publ by IEEE",
pages = "243--250",
editor = "Joe Brewer and Little, {Michael J.}",
booktitle = "1990 Proc Int Conf Wafer Scale Integr",
note = "1990 Proceedings - International Conference on Wafer Scale Integration ; Conference date: 23-01-1990 Through 25-01-1990",
}