Wavefront array processor: Language, architecture, and applications

Sun Yuan Kung, K. S. Arun, Ron J. Gal-Ezer, D. V.Bhaskar Rao

Research output: Contribution to journalArticle

165 Scopus citations

Abstract

This paper describes the development of a wavefront-based language and architecture for a programmable special-purpose multiprocessor array. Based on the notion of computational wavefront, the hardware of the processor array is designed to provide a computing medium that preserves the key properties of the wavefront. In conjunction, a wavefront language (MDFL) is introduced that drastically reduces the complexity of the description of parallel algorithms and simulates the wavefront propagation across the computing network. Together, the hardware and the language lead to a programmable wavefront array processor (WAP). The WAP blends the advantages of the dedicated systolic array and the general-purpose data-flow machine, and provides a powerful tool for the high-speed execution of a large class of matrix operations and related algorithms which have widespread applications.

Original languageEnglish (US)
Pages (from-to)1054-1066
Number of pages13
JournalIEEE Transactions on Computers
VolumeC-31
Issue number11
DOIs
StatePublished - Jan 1 1982
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

Keywords

  • Asynchrony
  • VLSI array processor
  • computational wavefront
  • concurrency
  • data-flow computing
  • matrix data-flow language
  • signal processing
  • systolic array
  • wavefront architecture

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