@inproceedings{5d83894a1f92485296d15d3162e0fde4,
title = "VLSI systolic array implementation of a staged decoder for BCM signals",
abstract = "This article deals with the design and VLSI Systolic Array hardware implementation of a Staged Decoder suitable for decoding Block-Coded-Modulated signals (BCM).",
author = "G. Caire and J. Ventura-Traveset and J. Murphy and Kung, {S. Y.}",
note = "Publisher Copyright: {\textcopyright} 1992 IEEE.; 6th IEEE Workshop on VLSI Signal Processing ; Conference date: 28-10-1992 Through 30-10-1992",
year = "1992",
doi = "10.1109/VLSISP.1992.641046",
language = "English (US)",
series = "Workshop on VLSI Signal Processing 1992",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "139--149",
editor = "Wojtek Przytula and Kung Yao and Rajeev Jain and Jan Rabaey",
booktitle = "Workshop on VLSI Signal Processing 1992",
address = "United States",
}