TY - GEN
T1 - Virtual memory mapped network interface for the SHRIMP multicomputer
AU - Blumrich, Matthias A.
AU - Li, Kai
AU - Alpert, Richard
AU - Dubnicki, Cezary
AU - Felten, Edward W.
AU - Sandberg, Jonathan
N1 - Funding Information:
We would like to thank Otto J. Anshus, Douglas W. Clark, and Richard J. Lipton sincerely for their numerous contributions to the SHRIMP project and to this paper. We are also grateful to the anonymous referees for their helpful comments. This work was supported by Nationai Science Foundation Grant CCR-9020893, ARPA and ONR under contracts NO001491-J-4039, and Intel Supercomputer Systems Division. Matthias Blumrich and Richard Alpert were supported in part by ARPA Fellowships in High PerformanceC omputing administered by the Institute for Advanced Computer Studies, University of Maryland.
Publisher Copyright:
© 1998 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.
PY - 1998/8/1
Y1 - 1998/8/1
N2 - The network interfaces of existing multicomputers require a significant amount of software overhead to provide protection and to implement message passing protocols. This paper describes the design of a low-latency, high-bandwidth, virtual memory-mapped network interface for the SHRIMP multicomputer project at Princeton University. Without sacrificing protection, the network interface achieves low latency by using virtual memory mapping and write-latency hiding techniques, and obtains high bandwidth by providing a user-level block data transfer mechanism. We have implemented several message passing primitives in an experimental environment, demonstrating that our approach can reduce the message passing overhead to a few user-level instructions.
AB - The network interfaces of existing multicomputers require a significant amount of software overhead to provide protection and to implement message passing protocols. This paper describes the design of a low-latency, high-bandwidth, virtual memory-mapped network interface for the SHRIMP multicomputer project at Princeton University. Without sacrificing protection, the network interface achieves low latency by using virtual memory mapping and write-latency hiding techniques, and obtains high bandwidth by providing a user-level block data transfer mechanism. We have implemented several message passing primitives in an experimental environment, demonstrating that our approach can reduce the message passing overhead to a few user-level instructions.
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U2 - 10.1145/285930.286006
DO - 10.1145/285930.286006
M3 - Conference contribution
AN - SCOPUS:63049105549
T3 - Proceedings - International Symposium on Computer Architecture
SP - 473
EP - 484
BT - ISCA 1998 - 25 years of the International Symposia on Computer Architecture (Selected Papers)
A2 - Sohi, Gurindar S.
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 25th International Symposium on Computer Architecture, ISCA 1998
Y2 - 27 June 1998 through 2 July 1998
ER -