Verifying Correct Microarchitectural Enforcement of Memory Consistency Models

Daniel Lustig; Michael Pellauer; Margaret Rose Martonosi

doi:10.1109/MM.2015.47

Verifying Correct Microarchitectural Enforcement of Memory Consistency Models

Daniel Lustig, Michael Pellauer, Margaret Rose Martonosi

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification.

Original language	English (US)
Article number	7106405
Pages (from-to)	72-82
Number of pages	11
Journal	IEEE Micro
Volume	35
Issue number	3
DOIs	https://doi.org/10.1109/MM.2015.47
State	Published - May 1 2015

All Science Journal Classification (ASJC) codes

Software
Hardware and Architecture
Electrical and Electronic Engineering

Keywords

PipeCheck
computer architecture
formal verification
memory architecture
memory consistency model
processor microarchitecture

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10.1109/MM.2015.47

Cite this

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title = "Verifying Correct Microarchitectural Enforcement of Memory Consistency Models",

abstract = "Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification.",

keywords = "PipeCheck, computer architecture, formal verification, memory architecture, memory consistency model, processor microarchitecture",

author = "Daniel Lustig and Michael Pellauer and Martonosi, {Margaret Rose}",

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N2 - Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification.

AB - Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification.

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KW - processor microarchitecture

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Verifying Correct Microarchitectural Enforcement of Memory Consistency Models

Abstract

All Science Journal Classification (ASJC) codes

Keywords

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