Verifying Correct Microarchitectural Enforcement of Memory Consistency Models

Daniel Lustig, Michael Pellauer, Margaret Rose Martonosi

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

Memory consistency models define the rules and guarantees about the ordering and visibility of memory references on multithreaded CPUs and systems on chip. PipeCheck offers a methodology and automated tool for verifying that a particular microarchitecture correctly implements the consistency model required by its architectural specification.

Original languageEnglish (US)
Article number7106405
Pages (from-to)72-82
Number of pages11
JournalIEEE Micro
Volume35
Issue number3
DOIs
StatePublished - May 1 2015

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • PipeCheck
  • computer architecture
  • formal verification
  • memory architecture
  • memory consistency model
  • processor microarchitecture

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