Abstract
Technology computer-aided design (TCAD) device and small circuit simulations use numerical and physics models to investigate the properties and performance of circuits before they undergo fabrication. Thus, these simulations play a significant role in VLSI design, optimization, and verification. However, they suffer from poor convergence and high CPU times, especially when performing TCAD mixed-mode simulations. In this paper, we propose a new simulation flow to address this challenge. We use device states captured from single devices to build a device state library. Then, we leverage device-level solutions to form a global initial guess for circuit-level simulations that are based on the full Newton algorithm. This leads to a significant efficiency enhancement. The average speedup for quasi-stationary (or dc) operating point establishment for a standard cell library and a mirror adder is 6.9 × and 21.2 ×, respectively, whereas the CPU time for static random access memory static noise margin extraction is reduced by 47.0%.
Original language | English (US) |
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Article number | 7956201 |
Pages (from-to) | 2616-2624 |
Number of pages | 9 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 25 |
Issue number | 9 |
DOIs | |
State | Published - Sep 2017 |
All Science Journal Classification (ASJC) codes
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering
Keywords
- Device simulation
- FinFET
- initial guess
- mixed-mode simulation
- technology computer-aided design (TCAD) simulation