User-perceived latency driven voltage scaling for interactive applications

Le Yan, Lin Zhong, Niraj Kumar Jha

Research output: Contribution to journalConference articlepeer-review

27 Scopus citations


Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as dynamic voltage scaling (DVS) and adaptive body biasing (ABB), have been shown to reduce energy consumption effectively. Previous works on DVS and ABB exploit low CPU utilization of the processor to drive voltage scaling. This has become inadequate for modern interactive applications involving high CPU usage. In this work, we target computer responsiveness during voltage scaling to exploit more opportunities for energy reduction. Instead of CPU utilization, we use the user-perceived latency, the delay between user input and computer response, to drive voltage scaling. Considering the tradeoff between energy consumption and computer responsiveness during voltage scaling not only reduces energy consumption effectively, but also ensures good computer responsiveness for interactive applications. Experimental results show that for the 70nm technology, during the execution of seven commonly-used interactive applications, the energy consumption of the processor using user-perceived latency driven DVS is reduced by an average of 37.3%, and the user-perceived latency by an average of 18.3%, compared to CPU utilization driven DVS. If both DVS and ABB are performed simultaneously based on the user-perceived latency, then the energy consumption is reduced by another 38.9% compared to when DVS is performed alone, while maintaining a similar computer responsiveness level. We have implemented user-perceived latency driven voltage scaling under Linux with X Window system. However, the methodology is extensible to other operating systems as well.

Original languageEnglish (US)
Article number38.3
Pages (from-to)624-627
Number of pages4
JournalProceedings - Design Automation Conference
StatePublished - Dec 1 2005
Event42nd Design Automation Conference, DAC 2005 - Anaheim, CA, United States
Duration: Jun 13 2005Jun 17 2005

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering


Dive into the research topics of 'User-perceived latency driven voltage scaling for interactive applications'. Together they form a unique fingerprint.

Cite this