Abstract
The requirements on both the computations and storages for neural networks are extremely demanding. Neural information processing would be practical only when efficient and high-speed computing hardware can be made available. In this tutorial, we review several approaches to architecture and implementation of neural networks for signal and image processing. In Section 2, we shall discuss direct design of dedicated neural networks implemented by a variety of hardware technologies (e.g. CMOS, CCD). In Section 3, we introduce an indirect design approach based on matrix-based mapping methodology for systolic/wavefront array processor. The array processors mapping technique presented should be applicable to both programmable neurocomputer and dedictated digital or analog neural processing circuits. In Section 4, we survey several key general-purpose and system-oriented design. Key design examples of existing parallel processing neurocomputers are also discussed.
Original language | English (US) |
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Title of host publication | Neural Networks for Signal Processing |
Publisher | Publ by IEEE |
Pages | 616-644 |
Number of pages | 29 |
ISBN (Print) | 0780301188 |
State | Published - Dec 1 1991 |
Event | Proceedings of the 1991 Workshop on Neural Networks for Signal Processing - NNSP-91 - Princeton, NJ, USA Duration: Sep 30 1991 → Oct 2 1991 |
Other
Other | Proceedings of the 1991 Workshop on Neural Networks for Signal Processing - NNSP-91 |
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City | Princeton, NJ, USA |
Period | 9/30/91 → 10/2/91 |
All Science Journal Classification (ASJC) codes
- Engineering(all)