Tutorial. Digital neurocomputing for signal/image processing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

The requirements on both the computations and storages for neural networks are extremely demanding. Neural information processing would be practical only when efficient and high-speed computing hardware can be made available. In this tutorial, we review several approaches to architecture and implementation of neural networks for signal and image processing. In Section 2, we shall discuss direct design of dedicated neural networks implemented by a variety of hardware technologies (e.g. CMOS, CCD). In Section 3, we introduce an indirect design approach based on matrix-based mapping methodology for systolic/wavefront array processor. The array processors mapping technique presented should be applicable to both programmable neurocomputer and dedictated digital or analog neural processing circuits. In Section 4, we survey several key general-purpose and system-oriented design. Key design examples of existing parallel processing neurocomputers are also discussed.

Original languageEnglish (US)
Title of host publicationNeural Networks for Signal Processing
PublisherPubl by IEEE
Pages616-644
Number of pages29
ISBN (Print)0780301188
StatePublished - Dec 1 1991
EventProceedings of the 1991 Workshop on Neural Networks for Signal Processing - NNSP-91 - Princeton, NJ, USA
Duration: Sep 30 1991Oct 2 1991

Other

OtherProceedings of the 1991 Workshop on Neural Networks for Signal Processing - NNSP-91
CityPrinceton, NJ, USA
Period9/30/9110/2/91

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Fingerprint Dive into the research topics of 'Tutorial. Digital neurocomputing for signal/image processing'. Together they form a unique fingerprint.

Cite this