The PARSEC benchmark suite: Characterization and architectural implications

Christian Bienia, Sanjeev Kumar, Jaswinder Pal Singh, Kai Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2157 Scopus citations

Abstract

This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Previous available benchmarks for multiprocessors have focused on highperformance computing applications and used a limited number of synchronization methods. PARSEC includes emerging applications in recognition, mining and synthesis (RMS) as well as systems applications which mimic large-scale multithreaded commercial programs. Our characterization shows that the benchmark suite covers a wide spectrum of working sets, locality, data sharing, synchronization and off-chip traffic. The benchmark suite has been made available to the public.

Original languageEnglish (US)
Title of host publicationPACT'08
Subtitle of host publicationProceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques
Pages72-81
Number of pages10
DOIs
StatePublished - Dec 1 2008
Event17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008 - Toronto, ON, Canada
Duration: Oct 25 2008Oct 29 2008

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
ISSN (Print)1089-795X

Other

Other17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008
CountryCanada
CityToronto, ON
Period10/25/0810/29/08

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

Keywords

  • Benchmark suite
  • Multithreading
  • Performance measurement
  • Shared-memory computers

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