Techniques for multicore thermal management: Classification and new exploration

Research output: Chapter in Book/Report/Conference proceedingConference contribution

361 Scopus citations


Power density continues to increase exponentially with each new technology generation, posing a major challenge for thermal management in modern processors. Much past work has examined microarchitectural policies for reducing total chip power, but these techniques alone are insufficient if not aimed at mitigating individual hotspots. The industry's current trend has been toward multicore architectures, which provide additional opportunities for dynamic thermal management. This paper explores various thermal management techniques that exploit the distributed nature of multicore processors. We classify these techniques in terms of core throttling policy, whether that policy is applied locally to a core or to the processor as a whole, and process migration policies. We use Turandot and a HotSpot-based thermal simulator to simulate a variety of workloads under thermal duress on a 4-core PowerPC™ processor. Using benchmarks from the SPEC 2000 suite we characterize workloads in terms of instruction throughput as well as their effective duty cycles. Among a variety of options we find that distributed control-theoretic DVFS alone improves throughput by 2.5X under our test conditions. Our final design involves a PI-based core thermal controller and an outer control loop to decide process migrations. This policy avoids all thermal emergencies and yields a,u average of 2.6X speedup over the baseline across all workloads.

Original languageEnglish (US)
Title of host publicationProceedings - 33rd International Symposium on Computer Architecture,ISCA 2006
Number of pages11
StatePublished - 2006
Event33rd International Symposium on Computer Architecture, ISCA 2006 - Boston, MA, United States
Duration: Jun 17 2006Jun 21 2006

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897


Other33rd International Symposium on Computer Architecture, ISCA 2006
Country/TerritoryUnited States
CityBoston, MA

All Science Journal Classification (ASJC) codes

  • General Engineering


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