TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology

Debajit Bhattacharya; Rajiv V. Joshi; Herschel A. Ainspan; Ninad D. Sathaye; Mohit Bajaj; Suresh Gundapaneni; Niraj K. Jha

doi:10.1109/CICC.2014.6945998

TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology

Debajit Bhattacharya, Rajiv V. Joshi, Herschel A. Ainspan, Ninad D. Sathaye, Mohit Bajaj, Suresh Gundapaneni, Niraj K. Jha

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

With continued scaling of bulk CMOS devices in the nanometer regime, technology computer-aided design (TCAD) assisted extraction of parasitic capacitances has gained importance for predicting the transient behavior of VLSI circuits. In this paper, we present a TCAD structure synthesis and capacitance extraction methodology in a 22nm CMOS process and report parasitic capacitances that affect the oscillation frequency of a 10 GHz voltage-controlled oscillator (VCO). We observe that front-end capacitances are becoming overwhelmingly dominant at nanometer nodes. We quantify the capacitive interactions between the front-end and back-end features using a layer-by-layer capacitance analysis. The estimated frequency tuning range is in agreement with the tuning range of a 22nm VCO hardware.

Original language	English (US)
Title of host publication	Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479932863
DOIs	https://doi.org/10.1109/CICC.2014.6945998
State	Published - Nov 4 2014
Event	36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014 - San Jose, United States Duration: Sep 15 2014 → Sep 17 2014

Publication series

Name	Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014

Other

Other	36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014
Country/Territory	United States
City	San Jose
Period	9/15/14 → 9/17/14

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/CICC.2014.6945998

Cite this

Bhattacharya, D., Joshi, R. V., Ainspan, H. A., Sathaye, N. D., Bajaj, M., Gundapaneni, S., & Jha, N. K. (2014). TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology. In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014 Article 6945998 (Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC.2014.6945998

Bhattacharya, Debajit ; Joshi, Rajiv V. ; Ainspan, Herschel A. et al. / TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology. Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014).

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title = "TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology",

abstract = "With continued scaling of bulk CMOS devices in the nanometer regime, technology computer-aided design (TCAD) assisted extraction of parasitic capacitances has gained importance for predicting the transient behavior of VLSI circuits. In this paper, we present a TCAD structure synthesis and capacitance extraction methodology in a 22nm CMOS process and report parasitic capacitances that affect the oscillation frequency of a 10 GHz voltage-controlled oscillator (VCO). We observe that front-end capacitances are becoming overwhelmingly dominant at nanometer nodes. We quantify the capacitive interactions between the front-end and back-end features using a layer-by-layer capacitance analysis. The estimated frequency tuning range is in agreement with the tuning range of a 22nm VCO hardware.",

author = "Debajit Bhattacharya and Joshi, {Rajiv V.} and Ainspan, {Herschel A.} and Sathaye, {Ninad D.} and Mohit Bajaj and Suresh Gundapaneni and Jha, {Niraj K.}",

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year = "2014",

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doi = "10.1109/CICC.2014.6945998",

language = "English (US)",

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Bhattacharya, D, Joshi, RV, Ainspan, HA, Sathaye, ND, Bajaj, M, Gundapaneni, S & Jha, NK 2014, TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology. in Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014., 6945998, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014, Institute of Electrical and Electronics Engineers Inc., 36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014, San Jose, United States, 9/15/14. https://doi.org/10.1109/CICC.2014.6945998

TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology. / Bhattacharya, Debajit; Joshi, Rajiv V.; Ainspan, Herschel A. et al.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 6945998 (Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Bhattacharya, Debajit

AU - Joshi, Rajiv V.

AU - Ainspan, Herschel A.

AU - Sathaye, Ninad D.

AU - Bajaj, Mohit

AU - Gundapaneni, Suresh

AU - Jha, Niraj K.

PY - 2014/11/4

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N2 - With continued scaling of bulk CMOS devices in the nanometer regime, technology computer-aided design (TCAD) assisted extraction of parasitic capacitances has gained importance for predicting the transient behavior of VLSI circuits. In this paper, we present a TCAD structure synthesis and capacitance extraction methodology in a 22nm CMOS process and report parasitic capacitances that affect the oscillation frequency of a 10 GHz voltage-controlled oscillator (VCO). We observe that front-end capacitances are becoming overwhelmingly dominant at nanometer nodes. We quantify the capacitive interactions between the front-end and back-end features using a layer-by-layer capacitance analysis. The estimated frequency tuning range is in agreement with the tuning range of a 22nm VCO hardware.

AB - With continued scaling of bulk CMOS devices in the nanometer regime, technology computer-aided design (TCAD) assisted extraction of parasitic capacitances has gained importance for predicting the transient behavior of VLSI circuits. In this paper, we present a TCAD structure synthesis and capacitance extraction methodology in a 22nm CMOS process and report parasitic capacitances that affect the oscillation frequency of a 10 GHz voltage-controlled oscillator (VCO). We observe that front-end capacitances are becoming overwhelmingly dominant at nanometer nodes. We quantify the capacitive interactions between the front-end and back-end features using a layer-by-layer capacitance analysis. The estimated frequency tuning range is in agreement with the tuning range of a 22nm VCO hardware.

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Bhattacharya D, Joshi RV, Ainspan HA, Sathaye ND, Bajaj M, Gundapaneni S et al. TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology. In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 6945998. (Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014). doi: 10.1109/CICC.2014.6945998

TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology

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