Task graph extraction for embedded system synthesis

Keith S. Vallerio, Niraj K. Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

45 Scopus citations

Abstract

Consumer demand and improvements in hardware have caused distributed real-time embedded systems to rapidly increase in complexity. As a result, designers faced with time-to-market constraints are forced to rely on intelligent design tools to enable them to keep up with demand. These tools are continually being used earlier in the design process when the design is at higher levels of abstraction. At the highest level of abstraction are hardware/software co-synthesis tools which take a system specification as input. Although many embedded systems are described in C, the system specifications for many of these tools are often in the form of one or more task graphs. These tools are very effective at solving the co-synthesis problem using task graphs but require that designers manually transform the specification from C code to task graphs, a tedious and error-prone job. The task graph extraction tool described in this paper reduces the potential for error and the time required to design an embedded system by automating the task graph extraction process. Such a tool can drastically improve designer productivity. As far as we know, this is the first tool of its kind. It has been made available on the web.

Original languageEnglish (US)
Title of host publicationProceedings - 16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design
PublisherIEEE Computer Society
Pages480-486
Number of pages7
ISBN (Electronic)0769518680
DOIs
StatePublished - Jan 1 2003
Event16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design - New Delhi, India
Duration: Jan 4 2003Jan 8 2003

Publication series

NameProceedings of the IEEE International Conference on VLSI Design
Volume2003-January
ISSN (Print)1063-9667

Other

Other16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design
CountryIndia
CityNew Delhi
Period1/4/031/8/03

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • Embedded software
  • Embedded system
  • Field programmable gate arrays
  • Hardware
  • Job design
  • Process design
  • Productivity
  • Real time systems
  • Software libraries
  • Software tools

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  • Cite this

    Vallerio, K. S., & Jha, N. K. (2003). Task graph extraction for embedded system synthesis. In Proceedings - 16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design (pp. 480-486). [1183180] (Proceedings of the IEEE International Conference on VLSI Design; Vol. 2003-January). IEEE Computer Society. https://doi.org/10.1109/ICVD.2003.1183180