Synthesis of power-optimized and area-optimized circuits from hierarchical behavioral descriptions

Mathematics

• Synthesis 100%
• Module 59%
• Optimization 50%
• High-level Synthesis 43%
• Power Consumption 35%
• Resource Sharing 35%
• Flow Graphs 30%
• Data Flow 29%
• Resource Allocation 29%
• Throughput 28%
• Degradation 27%
• CPU Time 27%
• Simple Module 26%
• Building Blocks 25%
• Efficacy 23%
• Scheduling 22%
• Experimental Results 22%
• Fast Algorithm 22%
• Resources 20%
• Multiplier 19%
• Filter 19%
• Efficient Algorithms 19%
• Optimal Solution 18%
• Interaction 15%
• Unit 15%
• Design 13%
• Demonstrate 13%
• Framework 12%

Engineering & Materials Science

• Networks (circuits) 61%
• Data flow graphs 31%
• High level synthesis 28%
• Adders 24%
• Fast Fourier transforms 21%
• Clocks 18%
• Program processors 18%
• Resource allocation 18%
• Electric power utilization 16%
• Degradation 15%
• Throughput 15%
• Scheduling 15%