Skip to main navigation
Skip to search
Skip to main content
Princeton University Home
Help & FAQ
Home
Profiles
Research units
Facilities
Projects
Research output
Press/Media
Search by expertise, name or affiliation
Synthesis of multi-level combinational circuits for complete robust path delay fault testability
N. H. Jha
, I. Pomeranz
, S. M. Reddy
, R. I. Miller
Electrical and Computer Engineering
Princeton Language and Intelligence (PLI)
Research output
:
Chapter in Book/Report/Conference proceeding
›
Conference contribution
15
Scopus citations
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'Synthesis of multi-level combinational circuits for complete robust path delay fault testability'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Keyphrases
Synthesis Rules
100%
Programmable Logic Arrays
25%
Computer Science
Programmable Logic Array
100%