Synthesis of Heterogeneous Distributed Architectures for Memory-intensive Applications

Computer Science

• Application Specific Integrated Circuit 100%
• Distributed Architecture 100%
• Intensive Application 100%
• Data Array 100%
• High Level Synthesis 66%
• Access Pattern 33%
• single-chip 33%
• Bandwidth Requirement 33%
• Data Access 33%
• Memory Architecture 33%
• Speed-up 33%
• Partitioning Technique 33%
• Application Benchmark 33%
• Access Requirement 33%
• Reference Data 33%
• Affine Function 33%
• Feasible Solution 33%
• Physical Memory 33%
• Data Access Pattern 33%

Keyphrases

• Data Reference 25%
• Array Index 25%