Subword permutation instructions for two-dimensional multimedia processing in MicroSIMD architectures

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26 Scopus citations

Abstract

MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in general-purpose processors. This paper addresses the unsolved problem of the need to permute the subwords packed in registers for maximum parallelism performance, especially for two-dimensional (2-D) multimedia algorithms. We propose a new systematic approach for identifying the fundamental data rearrangement needs in current and future 2-D pixel processing programs based on the hierarchical decomposition of frames and objects into atomic 2-D structures. We define new subword permutation instructions, Check, Excheck, Exchange, and Permset, that achieve these data rearrangements across multiple registers. We also define an alphabet of subword permutation primitives, including these new instructions and the Mix instruction defined for PA-RISC MAX-2 and IA-64, which supports the data rearrangement needs of 2-D frames and objects. We show the sufficiency and efficiency of this alphabet for achieving all possible permutations of hierarchical 2-D blocks.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
PublisherIEEE
Pages3-14
Number of pages12
StatePublished - Jan 1 2000
Event2000 IEEE International Conference on Application-Specific Systems, Architectures, and Processors - Boston, MA, USA
Duration: Jul 10 2000Jul 12 2000

Other

Other2000 IEEE International Conference on Application-Specific Systems, Architectures, and Processors
CityBoston, MA, USA
Period7/10/007/12/00

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Computer Networks and Communications

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