Study of excess heat capacity and suppressed kapitza conductance in TES devices

A number of groups have produced TES bolometers and other devices using dielectric membranes for thermal isolation in which excess heat capacity is reported. We have fabricated a series of TES devices using large area membranes and narrow legs for thermal isolation to study the scaling of intrinsic parameters like the heat capacity of the membrane. The devices are arranged on a single chip to ensure similarity of devices parameters (i.e., film thicknesses) and processing history. Measurements (non-multiplexed) of the current-voltage characteristic and complex impedance are made using a well-characterized, highly uniform, multichannel SQUID setup. We have developed model for non-ideal transition edge sensor performance that enables extraction of heat capacities and thermal conductances identified in the models.We report on the magnitude of excess heat capacity in the dielectric membrane and thermal conductance of the metal-to-dielectric interface in each of the designs.