Steady-state Thermal Conductivity Measurement of Dielectric Stacks for Phase- Change Memory Power Reduction

Phase-change memory (PCM) devices require lower write power to be competitive with other memory devices. A promising method to decrease the write power required for switching is to localize heating and thus develop thermally confined devices. In this regard, it is increasingly necessary to reduce the thermal conductivity of the dielectric layer used in these device structures. In this work, we investigate the temperature-dependent thermal conductivities of alternating stacks of thin-film amorphous dielectrics, specifically SiO2/Al2O3 and SiO2/Si3N4. Experiments were performed using steady-state Joule-heating and electrical thermometry, while using a microminiature refrigerator (MMR) over a wide temperature range (100 K - 500 K). The measurements show that the amorphous thin-film stacks exhibit effective out-of-plane room temperature thermal conductivities of about 1.14 and 0.48 W /(m × K), respectively. Both of these values are lower than bulk thermal conductivities of their constituent films. Molecular Dynamics (MD) simulations show that increased scattering at the boundary between layers, and not acoustic mismatch, is the source of the increased resistance for these thin-films. Additional Finite- Element (FE) simulations show that the primary heat loss path for dash-type cells is through the dielectric and that the SiO2/Al2O3 stacked dielectric films improve PCM cell heating by 42%.