Statistical ADC enhanced by pipelining and subranging

This brief explores the potential for enhancing both the achievable dynamic range and energy efficiency of statistical analog-to-digital converters (ADCs). To address dynamic range, the focus is on 1) the use of a strong kernel for statistical estimation (maximum-likelihood estimator) and 2) enabling the use of a large number of statistical observations. However, such a kernel, when used with a large number of observations, imposes high complexity and energy cost. To address energy, a pipelined front-end estimator is employed for coarse subrange estimation, and a back-end estimator is employed for fine statistical estimation. Architectural optimization of the back-end and front-end estimators is presented. For an ADC with nominal resolution of 10 bits, the approach achieves < 1.3 LSB root-mean-square error, while reducing computations by 15× compared to full statistical estimation.