Stacked quantum dot transistor and charge-induced confinement enhancement

L. J. Guo; S. Y. Chou

doi:10.1049/el:19980717

Stacked quantum dot transistor and charge-induced confinement enhancement

L. J. Guo, S. Y. Chou

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

A new quantum dot transistor that has a polysilicon dot floating gate stacked on top of a silicon quantum dot channel has been fabricated. It is observed that charging of the floating gate not only shifts the threshold voltage of the quantum dot transistor, but also significantly increases the peak-to-valley ratio and peak separation in the conductance oscillations.

Original language	English (US)
Pages (from-to)	1030-1031
Number of pages	2
Journal	Electronics Letters
Volume	34
Issue number	10
DOIs	https://doi.org/10.1049/el:19980717
State	Published - May 14 1998

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1049/el:19980717

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title = "Stacked quantum dot transistor and charge-induced confinement enhancement",

abstract = "A new quantum dot transistor that has a polysilicon dot floating gate stacked on top of a silicon quantum dot channel has been fabricated. It is observed that charging of the floating gate not only shifts the threshold voltage of the quantum dot transistor, but also significantly increases the peak-to-valley ratio and peak separation in the conductance oscillations.",

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AB - A new quantum dot transistor that has a polysilicon dot floating gate stacked on top of a silicon quantum dot channel has been fabricated. It is observed that charging of the floating gate not only shifts the threshold voltage of the quantum dot transistor, but also significantly increases the peak-to-valley ratio and peak separation in the conductance oscillations.

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JO - Electronics Letters

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Stacked quantum dot transistor and charge-induced confinement enhancement

Abstract

All Science Journal Classification (ASJC) codes

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