@inproceedings{ef72e442bdcc4b6c9183d3b3a0983167,
title = "SpFlow: Memory-driven data flow optimization for sparse matrix-matrix multiplication",
abstract = "To improve the performance of sparse matrix-matrix multiplication (SpMM) running on a specialized architecture, orchestrating a data flow that maximizes data reuse in local memory is critical but challenging due to the irregular non-zero element locations and the wide range of sparsity. In this work, we proposed SpFlow, a memory-driven data flow optimization framework for SpMM. SpFlow can realize 54X fewer DRAM accesses and 97X fewer SRAM accesses on average than a GPU running the cuSPARSE kernel. And in comparison with a state-of-the-art accelerator, the performance can be improved by 3X, and SRAM accesses reduced by 5X on average.",
author = "Qi Nie and Sharad Malik",
year = "2019",
month = jan,
day = "1",
doi = "10.1109/ISCAS.2019.8702111",
language = "English (US)",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings",
address = "United States",
note = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 ; Conference date: 26-05-2019 Through 29-05-2019",
}