@inproceedings{269ee6be91904efa9a8c078c089fad7b,
title = "Solving boolean satisfiability with dynamic hardware configurations",
abstract = "Boolean satisfiability (SAT) is a core computer science problem with many important commercial applications. An NP-complete problem, many different approaches for accelerating SAT either in hardware or software have been proposed. In particular, our prior work studied mechanisms for accelerating SAT using configurable hardware to implement formula-specific solver circuits. In spite of this progress, SAT solver runtimes still show room for further improvement. In this paper, we discuss further improvements to configurable-hardware-based SAT solvers. We discuss how dynamic techniques can be used to add the new solver circuitry to the hardware during run-time. By examining the basic solver structure, we explore how it can be best designed to support such dynamic reconfiguration techniques. These approaches lead to several hundred times speedups for many problems. Overall, this work offers a concrete example of how aggressively employing on-the-fly reconfigurability can enable runtime learning processes in hardware. As such, this work opens new opportunities for high performance computing using dynamically reconfigurable hardware.",
author = "Peixin Zhong and Margaret Martonosi and Pranav Ashar and Sharad Malik",
note = "Publisher Copyright: {\textcopyright} Springer-Verlag Berlin Heidelberg 1998.; 8th International Workshop on Field-Programmable Logic and Applications, FPL 1998 ; Conference date: 31-08-1998 Through 03-09-1998",
year = "1998",
doi = "10.1007/bfb0055260",
language = "English (US)",
isbn = "3540649484",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "326--335",
editor = "Hartenstein, {Reiner W.} and Andres Keevallik",
booktitle = "Field-Programmable Logic and Applications",
address = "Germany",
}