Software support for speculative loads

Anne Rogers, Kai Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

37 Scopus citations

Abstract

This paper describes a simple hardware mechanism and related compiler support for software-controlled speculative loads. The compiler issues speculative load instructions based on anticipated data references and the ability of the memory system to hide memory latency in high-performance processors. The architectural support for such a mechanism is simple and minimal, yet handles faults gracefully. We have simulated the speculative load mechanism based on a MIPS processor and a detailed memory system. The results of scientific kernel loops indicate that our speculative load technique is an effective approaches to hiding memory latency.

Original languageEnglish (US)
Title of host publicationInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS
PublisherPubl by ACM
Pages38-50
Number of pages13
Edition9
ISBN (Print)0897915356, 9780897915359
DOIs
StatePublished - Jan 1 1992
EventProceedings of the Fifth International Conference on Architectural Support Programming Languages and Operating Systems - ASPLOS-V - Boston, MA, USA
Duration: Oct 12 1992Oct 15 1992

Publication series

NameInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS
Number9
Volume27

Other

OtherProceedings of the Fifth International Conference on Architectural Support Programming Languages and Operating Systems - ASPLOS-V
CityBoston, MA, USA
Period10/12/9210/15/92

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

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