TY - GEN
T1 - Smart Pixel Optical Computing Architectures
AU - Sawchuk, A. A.
AU - Cheng, L.
AU - Forrest, S. R.
AU - Prucnal, P. R.
N1 - Funding Information:
This work was supported by NSF Grant No. ECS-9015797 and by the Air Force Office of Scientific Research under Grant No. F49620-92-J-0432.
Publisher Copyright:
© 1993 OSA - The Optical Society. All rights reserved.
PY - 1993
Y1 - 1993
N2 - We describe five classes of smart pixel devices with increasing complexity and present an optoelectronic integrated circuit (OEIC) smart pixel array having programmable amplifier, inverter, logic element, bistable switch or latch functions. These devices are used in transmissive and reflective architectures to implement reconfigurable processors, multiplexed shuffle networks, cellular hypercube processors or sorting networks.
AB - We describe five classes of smart pixel devices with increasing complexity and present an optoelectronic integrated circuit (OEIC) smart pixel array having programmable amplifier, inverter, logic element, bistable switch or latch functions. These devices are used in transmissive and reflective architectures to implement reconfigurable processors, multiplexed shuffle networks, cellular hypercube processors or sorting networks.
UR - http://www.scopus.com/inward/record.url?scp=85063461819&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85063461819&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85063461819
T3 - Optics InfoBase Conference Papers
SP - 214
EP - 217
BT - Optical Computing, OC 1993
PB - Optica Publishing Group (formerly OSA)
T2 - Optical Computing, OC 1993
Y2 - 16 March 1993 through 19 March 1993
ER -