SLOPES: Hardware-software cosynthesis of low-power real-time distributed embedded systems with dynamically reconfigurable FPGAs

Keyphrases

• Low Power 100%
• Hardware Complexity 100%
• Dynamically Reconfigurable 100%
• Co-synthesis 100%
• Distributed Embedded Systems 100%
• Real-time Distributed 100%
• Field Programmable Gate Array 100%
• Scheduling Algorithm 66%
• Multi-rate 66%
• Real-time Constraints 66%
• Average Power Consumption 66%
• Communication Resources 66%
• Communication Event 66%
• Two Dimensional 33%
• Type Systems 33%
• Reconfiguration 33%
• Evolutionary Algorithms 33%
• Processing Element 33%
• Reconfiguration Overhead 33%
• System Architecture 33%
• System Resources 33%
• Array Processor 33%
• Priority-based 33%
• Heterogeneous Communication 33%
• Schedule Length 33%
• Multiple Systems 33%
• Reconfigurable Computing 33%
• Dynamic Priority 33%
• Task Priority 33%
• Array Reconfiguration 33%
• Partial Reconfiguration 33%
• Frame Field 33%

Computer Science

• Reconfiguration 100%
• Field Programmable Gate Array 100%
• Embedded System 100%
• Scheduling Algorithm 66%
• Time Constraint 66%
• Communication Event 66%
• Communication Resource 66%
• Average Power Consumption 66%
• Experimental Result 33%
• Multiobjective 33%
• Processing Element 33%
• System Resource 33%
• Array Processor 33%
• Multiple System 33%
• Overhead Information 33%
• System Architecture 33%
• Evolutionary Algorithm 33%