TY - JOUR
T1 - SIMPLE 'NEURAL' OPTIMIZATION NETWORKS
T2 - AN A/D CONVERTER, SIGNAL DECISION CIRCUIT, AND A LINEAR PROGRAMMING CIRCUIT.
AU - Tank, David W.
AU - Hopfield, John J.
PY - 1986
Y1 - 1986
N2 - The rapid solution of several optimization problems by highly interconnected networks of simple analog processors is described. Analog-to-digital (A/D) conversion was considered as a simple optimization problem, and an A/D converter of novel architecture was designed. A/D conversion is a simple example of a more general class of signal-decision problems which, as is shown here, can also be solved by appropriately constructed networks. Circuits to solve these problems were designed using general principles which result from an understanding of the basic collective computational properties of a specific class of analog-processor networks. It is also shown that a network which solves linear programming problems can be understood from the same concepts.
AB - The rapid solution of several optimization problems by highly interconnected networks of simple analog processors is described. Analog-to-digital (A/D) conversion was considered as a simple optimization problem, and an A/D converter of novel architecture was designed. A/D conversion is a simple example of a more general class of signal-decision problems which, as is shown here, can also be solved by appropriately constructed networks. Circuits to solve these problems were designed using general principles which result from an understanding of the basic collective computational properties of a specific class of analog-processor networks. It is also shown that a network which solves linear programming problems can be understood from the same concepts.
UR - http://www.scopus.com/inward/record.url?scp=0022721216&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0022721216&partnerID=8YFLogxK
U2 - 10.1109/tcs.1986.1085953
DO - 10.1109/tcs.1986.1085953
M3 - Article
AN - SCOPUS:0022721216
SN - 0098-4094
VL - CAS-33
SP - 533
EP - 541
JO - IEEE transactions on circuits and systems
JF - IEEE transactions on circuits and systems
IS - 5
ER -