Self-passivated copper gates for amorphous silicon thin film transistors

A solution to the thin film silicon transistor gate metallization problem in active matrix liquid crystal displays is demonstrated in the form of a self-passivation process for copper. Bottom-level copper (Cu) lines are passivated by a self-aligned chromium oxide encapsulation formed by surface segregation of chromium (Cr) from dilute Cu_1-xCr_x alloys at 400 degrees C. The encapsulation is an efficient barrier for Cu diffusion into the SiN_x gate insulator during the plasma deposition and transistor processing, and solves the problems of oxidation and adhesion to the glass substrate without introducing additional mask steps into the manufacturing process. Gate line resistivities of 4.5 μΩcm are obtained. The performance of self-passivated Cu-gate thin film transistors is comparable to that of transistors with refractory metal gates.