Self-passivated copper gates for amorphous silicon thin-film transistors

H. Sirringhaus, S. D. Theiss, A. Kahn, S. Wagner

Research output: Contribution to journalArticle

31 Scopus citations

Abstract

A solution to the amorphous silicon transistor gate metallization problem in active matrix liquid crystal displays (AMLCD's) is demonstrated, in the form of a self-passivated copper (Cu) process. Cu is passivated by a self-aligned chromium (Cr) oxide encapsulation formed by surface segregation of Cr in dilute Cu-10-30at.%Cr alloys at 400 °C, solving the problems of chemical reactivity during the plasma deposition, diffusion, poor adhesion to the substrate, and oxidation. The performance of selfpassivated Cu bottom-gate thin-film transistors (TFT's) and their stability during thermal bias stress testing is comparable to that of Cr-gate reference TFT's. The gate line resistivity (including encapsulation) is 4.5 μΩ·cm at present.

Original languageEnglish (US)
Pages (from-to)388-390
Number of pages3
JournalIEEE Electron Device Letters
Volume18
Issue number8
DOIs
StatePublished - Aug 1 1997

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Self-passivated copper gates for amorphous silicon thin-film transistors'. Together they form a unique fingerprint.

  • Cite this