Security Verification via Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach

Caroline Trippel, Daniel Lustig, Margaret Rose Martonosi

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

Many hardware security exploits result from the combination of well-known attack classes with newly exploited hardware features. CheckMate is an approach and automated tool for evaluating microarchitectural susceptibility to specified attack classes, and for synthesizing proof-of-concept exploit code for susceptible designs.

Original languageEnglish (US)
Article number8686197
Pages (from-to)84-93
Number of pages10
JournalIEEE Micro
Volume39
Issue number3
DOIs
StatePublished - May 1 2019

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Security Verification via Automatic Hardware-Aware Exploit Synthesis: The CheckMate Approach'. Together they form a unique fingerprint.

  • Cite this