TY - GEN
T1 - Runtime validation of Transactional Memory Systems
AU - Chen, Kaiyu
AU - Malik, Sharad
AU - Patra, Priyadarsan
PY - 2008
Y1 - 2008
N2 - Transactional Memory (TM) has been proposed as a promising solution to effectively harness the increasing processing power of emerging multi/many-core systems. While there has been considerable research on the design and implementation of TM systems, it remains to be shown how to address the validation challenge of such systems in face of increasing design bugs and dynamic errors. This paper proposes a runtime validation methodology for ensuring the end-to-end correctness of a TM system. We use an extended constraint graph model to capture the correctness of a transactional execution, and provide efficient hardware support to perform online checking of this constraint graph. We describe the design ideas as well as the key optimization techniques to make this approach practical. Experiments based on a state-of-the-art TM system framework show that our design effectively performs system-level runtime validation with relatively small overhead.
AB - Transactional Memory (TM) has been proposed as a promising solution to effectively harness the increasing processing power of emerging multi/many-core systems. While there has been considerable research on the design and implementation of TM systems, it remains to be shown how to address the validation challenge of such systems in face of increasing design bugs and dynamic errors. This paper proposes a runtime validation methodology for ensuring the end-to-end correctness of a TM system. We use an extended constraint graph model to capture the correctness of a transactional execution, and provide efficient hardware support to perform online checking of this constraint graph. We describe the design ideas as well as the key optimization techniques to make this approach practical. Experiments based on a state-of-the-art TM system framework show that our design effectively performs system-level runtime validation with relatively small overhead.
UR - http://www.scopus.com/inward/record.url?scp=49749138572&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=49749138572&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2008.4479832
DO - 10.1109/ISQED.2008.4479832
M3 - Conference contribution
AN - SCOPUS:49749138572
SN - 0769531172
SN - 9780769531175
T3 - Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
SP - 750
EP - 756
BT - Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
T2 - 9th International Symposium on Quality Electronic Design, ISQED 2008
Y2 - 17 March 2008 through 19 March 2008
ER -