Reversible logic synthesis with Fredkin and Peres gates

James Donald, Niraj K. Jha

Research output: Contribution to journalArticle

49 Scopus citations

Abstract

Reversible logic has applications in low-power computing and quantum computing. Most reversible logic synthesis methods are tied to particular gate types, and cannot synthesize large functions. This article extends RMRLS, a reversible logic synthesis tool, to include additional gate types. While classic RMRLS can synthesize functions using NOT, CNOT, and n-bit Toffoli gates, our work details the inclusion of n-bit Fredkin and Peres gates. We find that these additional gates reduce the average gate count for three-variable functions from 6.10 to 4.56, and improve the synthesis results of many larger functions, both in terms of gate count and quantum cost.

Original languageEnglish (US)
Article number2
JournalACM Journal on Emerging Technologies in Computing Systems
Volume4
Issue number1
DOIs
StatePublished - Mar 1 2008

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • Quantum computing
  • Reversible logic

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