Retargetable static timing analysis for embedded software

Research output: Contribution to journalConference article

28 Scopus citations

Abstract

This paper presents a novel approach for retargetable static software timing analysis. Specifically, we target the problem of determining bounds on the execution time of a program on modern processors, and solve this problem in a retargetable software development environment. Another contribution of this paper is the modeling of important features in contemporary architectures, such as branch prediction, predication, and instruction pre-fetching, which have great impact on system performance, and have been rarely handled thus far. These ideas allow to build a timing analysis tool that is efficient, accurate, modular and retargetable. We present preliminary results for sample embedded programs to demonstrate the applicability of the proposed approach.

Original languageEnglish (US)
Pages (from-to)39-44
Number of pages6
JournalProceedings of the International Symposium on System Synthesis
DOIs
StatePublished - 2001
Event14th International Symposium on System Synthesis (ISSS'01) - Montreal, Que., Canada
Duration: Sep 30 2001Oct 3 2001

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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