Reliability of Highly Stable Amorphous-Silicon Thin-Film Transistors under Low Gate-Field Stress - Part I: Two-Stage Model for Lifetime Prediction

T. Liu, L. E. Aygun, S. Wagner, J. C. Sturm

Research output: Contribution to journalArticle

4 Scopus citations

Abstract

To predict reliability, an analytical model for drain current degradation in amorphous-silicon (a-Si) thin-film transistors (TFTs) is developed for the low-gate-field region, where defect creation dominates the threshold voltage shift. Starting with fundamental models where the local threshold shift depends on the local channel electron density, a stretched exponential expression for current degradation in linear and saturation modes is derived and related to an effective threshold voltage. The model was used to predict room temperature stability from accelerated stress up to 140 °C in highly stable TFTs with hydrogenated a-Si channels and silicon nitride (SiNx) gate insulators. For high temperatures and long times at all temperatures, defect creation dominated the decay. A 'unified' stretched exponential fit, in which a single fitting parameter is used to convert time into 'thermalization energy,' unifies drain current decay at different temperatures into a single curve. At short times near room temperature, a second mechanism ascribed to charge trapping also contributes to the initial degradation. This contribution is attributed to charge trapping in the SiNx gate insulator and can also be fitted with a stretched exponential expression. A two-stage model that combines both mechanisms is used for best predictions of room temperature stability. Part II of this paper will show that this two-stage model facilitates the optimization of the fabrication of a-Si TFTs with very high stability.

Original languageEnglish (US)
Article number7399743
Pages (from-to)243-254
Number of pages12
JournalIEEE Transactions on Device and Materials Reliability
Volume16
Issue number2
DOIs
StatePublished - Jun 2016

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering

Keywords

  • Two-stage model
  • a-Si TFTs
  • defect creation and charge trapping
  • stability
  • unified stretched exponential

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