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Register transfer modeling and simulation for array processors
W. H. Chou
,
S. Y. Kung
Electrical and Computer Engineering
Center for Statistics & Machine Learning
Research output
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peer-review
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Dive into the research topics of 'Register transfer modeling and simulation for array processors'. Together they form a unique fingerprint.
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Engineering
Array Architecture
100%
Data Flow Graph
100%
Real Data
100%
Resource Utilisation
100%
Simulators
100%
Keyphrases
Interactive Simulator
33%
Register Transfer Language
33%
Transfer Modelling
100%
Transfer Simulation
100%
Computer Science
Register-Transfer Language
33%