Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length

Effendi Leobandung; Stephen Y. Chou

Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper reports the fabrication and characterization of SOI NMOSFETs with channel width as narrow as 35 nm. For the first time, it is observed that using a narrow channel width, the short channel effects in SOI MOSFETs can be significantly reduced because the gate wrapped around the narrow channel side wall allowing a better gate control in horizontal and vertical direction. With a 35 nm channel width, well-behaved SOI NMOSFETs with effective channel length of 70 nm can be realized.

Original language	English (US)
Pages	110-111
Number of pages	2
State	Published - 1996
Externally published	Yes
Event	Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC - Santa Barbara, CA, USA Duration: Jun 24 1996 → Jun 26 1996

Other

Other	Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC
City	Santa Barbara, CA, USA
Period	6/24/96 → 6/26/96

All Science Journal Classification (ASJC) codes

General Engineering

Cite this

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title = "Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length",

abstract = "This paper reports the fabrication and characterization of SOI NMOSFETs with channel width as narrow as 35 nm. For the first time, it is observed that using a narrow channel width, the short channel effects in SOI MOSFETs can be significantly reduced because the gate wrapped around the narrow channel side wall allowing a better gate control in horizontal and vertical direction. With a 35 nm channel width, well-behaved SOI NMOSFETs with effective channel length of 70 nm can be realized.",

author = "Effendi Leobandung and Chou, \{Stephen Y.\}",

year = "1996",

language = "English (US)",

pages = "110--111",

note = "Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC ; Conference date: 24-06-1996 Through 26-06-1996",

}

TY - CONF

T1 - Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length

AU - Leobandung, Effendi

AU - Chou, Stephen Y.

PY - 1996

Y1 - 1996

N2 - This paper reports the fabrication and characterization of SOI NMOSFETs with channel width as narrow as 35 nm. For the first time, it is observed that using a narrow channel width, the short channel effects in SOI MOSFETs can be significantly reduced because the gate wrapped around the narrow channel side wall allowing a better gate control in horizontal and vertical direction. With a 35 nm channel width, well-behaved SOI NMOSFETs with effective channel length of 70 nm can be realized.

AB - This paper reports the fabrication and characterization of SOI NMOSFETs with channel width as narrow as 35 nm. For the first time, it is observed that using a narrow channel width, the short channel effects in SOI MOSFETs can be significantly reduced because the gate wrapped around the narrow channel side wall allowing a better gate control in horizontal and vertical direction. With a 35 nm channel width, well-behaved SOI NMOSFETs with effective channel length of 70 nm can be realized.

UR - https://www.scopus.com/pages/publications/0029703645

UR - https://www.scopus.com/inward/citedby.url?scp=0029703645&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0029703645

SP - 110

EP - 111

T2 - Proceedings of the 1996 54th Annual Device Research Conference Digest, DRC

Y2 - 24 June 1996 through 26 June 1996

ER -

Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length

Abstract

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All Science Journal Classification (ASJC) codes

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