TY - GEN
T1 - Reduction of Series Resistance in Top-Gate ZnO Thin-Film Transistors by Air Exposure and Oxygen Plasma Treatment
AU - Tang, Zili
AU - Islam, Mohammad Shafiqul
AU - Wagner, Sigurd
AU - Verma, Naveen
AU - Sturm, James C.
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Thin-film transistors (TFTs) are typically made with a non-self-aligned bottom-gate process, which causes large parasitic capacitance from the gate and source/drain (S/D) overlaps. While a top-gate structure can effectively reduce the parasitic capacitance, it can lead to a large series resistance between the gated channel and the S/D contacts (Fig. 1(a)) due to high resistivity of the as-deposited semiconductor (ZnO in our case). We use a self-aligned plasma treatment (Fig. 1(b)) to lower the resistivity outside of the channel region. In the literature, oxygen strongly affects the resistivity of ZnO, as oxygen vacancies are a common defect and donor in ZnO [1]. However, oxygen plasma treatment has been reported to raise the mobility but reduce the carrier concentration [2] , or increase the carrier concentration but reduce the mobility [3]. ZnO resistivity may increase up to 107 mΩ·cm [4] or be reduced to 2 mΩ·cm [3] , depending on the ZnO deposition method (sputtering, sol-gel, etc.) and plasma treatment conditions, which can yield different microstructures in the ZnO thin film. In our work, we exposed top-gate nanocrystalline ZnO TFTs to an O-plasma. A self-aligned plasma treatment raised the output saturation current by a factor of ×100. But surprisingly, we find that it is the exposure to ambient air, not to the plasma, that is decisive in reducing the series resistance in our work.
AB - Thin-film transistors (TFTs) are typically made with a non-self-aligned bottom-gate process, which causes large parasitic capacitance from the gate and source/drain (S/D) overlaps. While a top-gate structure can effectively reduce the parasitic capacitance, it can lead to a large series resistance between the gated channel and the S/D contacts (Fig. 1(a)) due to high resistivity of the as-deposited semiconductor (ZnO in our case). We use a self-aligned plasma treatment (Fig. 1(b)) to lower the resistivity outside of the channel region. In the literature, oxygen strongly affects the resistivity of ZnO, as oxygen vacancies are a common defect and donor in ZnO [1]. However, oxygen plasma treatment has been reported to raise the mobility but reduce the carrier concentration [2] , or increase the carrier concentration but reduce the mobility [3]. ZnO resistivity may increase up to 107 mΩ·cm [4] or be reduced to 2 mΩ·cm [3] , depending on the ZnO deposition method (sputtering, sol-gel, etc.) and plasma treatment conditions, which can yield different microstructures in the ZnO thin film. In our work, we exposed top-gate nanocrystalline ZnO TFTs to an O-plasma. A self-aligned plasma treatment raised the output saturation current by a factor of ×100. But surprisingly, we find that it is the exposure to ambient air, not to the plasma, that is decisive in reducing the series resistance in our work.
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U2 - 10.1109/DRC61706.2024.10605390
DO - 10.1109/DRC61706.2024.10605390
M3 - Conference contribution
AN - SCOPUS:85201058653
T3 - Device Research Conference - Conference Digest, DRC
BT - DRC 2024 - 82nd Device Research Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 82nd Device Research Conference, DRC 2024
Y2 - 24 June 2024 through 26 June 2024
ER -