Rapid single-chip secure processor prototyping on the Open SPARC FPGA platform

Jakub M. Szefer, Wei Zhang, Yu Yuan Chen, David Champagne, King Chan, Will X.Y. Li, Ray C.C. Cheung, Ruby Bei-Loh Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Secure processors have become increasingly important for trustworthy computing as security breaches escalate. By providing hardware-level protection, a secure processor ensures a safe computing environment where confidential data and applications can be protected against both hardware and software attacks. In this paper, we present a single-chip secure processor model and demonstrate rapid prototyping of the secure processor on the OpenSPARC FPGA platform. OpenSPARC T1 is an industry-grade, open-source, FPGA-synthesizable general-purpose microprocessor originally developed by Sun Microsystems, now acquired by Oracle. It is a multi-core, multi-threaded 64-bit processor with open-source hardware, including the microprocessor core, as well as system software that can be freely modified by researchers. We modify the OpenSPARC T1 processor by adding security modules: an AES engine, a TRNG and a memory integrity tree. These enhancements enable security features like memory encryption and memory integrity verification. By prototyping this single-chip secure processor on the FPGA platform, we find that the OpenSPARC T1 FPGA platform has many advantages for secure processor research. Our prototyping demonstrates that additional modules can be added quickly and easily and they add little resource overhead to the base OpenSPARC processor.

Original languageEnglish (US)
Title of host publicationProceedings of the 2011 22nd IEEE International Symposium on Rapid System Prototyping
Subtitle of host publicationShortening the Path from Specification to Prototype, RSP-2011
Pages38-44
Number of pages7
DOIs
StatePublished - Jul 28 2011
Event2011 22nd IEEE International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP-2011 - Karlsruhe, Germany
Duration: May 24 2011May 27 2011

Publication series

NameProceedings of the International Workshop on Rapid System Prototyping
ISSN (Print)1074-6005

Other

Other2011 22nd IEEE International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP-2011
CountryGermany
CityKarlsruhe
Period5/24/115/27/11

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

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    Szefer, J. M., Zhang, W., Chen, Y. Y., Champagne, D., Chan, K., Li, W. X. Y., Cheung, R. C. C., & Lee, R. B-L. (2011). Rapid single-chip secure processor prototyping on the Open SPARC FPGA platform. In Proceedings of the 2011 22nd IEEE International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP-2011 (pp. 38-44). [5929973] (Proceedings of the International Workshop on Rapid System Prototyping). https://doi.org/10.1109/RSP.2011.5929973