Programmable picosecond pulse generator in CMOS

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Scopus citations


In this paper, a scalable and reconfigurable architecture is presented for digitally programmable sub-THz waveform generation in CMOS. The architecture allows individual control of both amplitudes and phases of harmonic frequencies beyond fmax to achieve waveform shaping. This is enabled through controlled interference of multiple traveling-waves with rich harmonic components and delays. As an example, inspired from mode-locked laser, picosecond pulse generation is demonstrated in CMOS with a measured pulse-width of 2.6ps and 0.46 mW output power for the pulse train. To the best of the authors' knowledge, this is the smallest pulse width demonstrated in integrated circuit technology with additional capability of dynamic reconfiguration. The chip is fabricated in 65nm LP CMOS process.

Original languageEnglish (US)
Title of host publication2015 IEEE MTT-S International Microwave Symposium, IMS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479982752
StatePublished - Jul 24 2015
EventIEEE MTT-S International Microwave Symposium, IMS 2015 - Phoenix, United States
Duration: May 17 2015May 22 2015

Publication series

Name2015 IEEE MTT-S International Microwave Symposium, IMS 2015


OtherIEEE MTT-S International Microwave Symposium, IMS 2015
Country/TerritoryUnited States

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Signal Processing
  • Electrical and Electronic Engineering


  • CMOS
  • Picosecond pulse
  • harmonics
  • millimeter-wave
  • nonlinearity
  • terahertz
  • traveling-wave
  • wave-form shaping


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