Processor evaluation in an embedded systems design environment

T. V.K. Gupta, Purvesh Sharma, M. Balakrishnan, Sharad Malik

Research output: Contribution to conferencePaper

30 Scopus citations

Abstract

In this paper, we present a novel methodology for processor evaluation in an embedded systems design environment. This evaluation can help in either selecting a suitable processor core or in evaluating changes to an ASIP. The processor evaluation is carried out in two stages. First, an architecture independent stage in which processors are rejected based on key application parameters and secondly, an architecture dependent stage in which performance is estimated on selected processors. The contribution of our work includes identification of application parameters which can influence processor selection, a mechanism to capture widely varying processor architectures and an instruction constrained scheduler. Initial experimental results suggest the potential of this approach.

Original languageEnglish (US)
Pages98-103
Number of pages6
StatePublished - 2000
Externally publishedYes
EventThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium - Calcutta, India
Duration: Jan 3 2000Jan 7 2000

Other

OtherThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium
CityCalcutta, India
Period1/3/001/7/00

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Gupta, T. V. K., Sharma, P., Balakrishnan, M., & Malik, S. (2000). Processor evaluation in an embedded systems design environment. 98-103. Paper presented at The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium, Calcutta, India, .