Pre-silicon verification of the Alpha 21364 microprocessor error handling system

R. Lee, B. Tsien

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations


This paper presents the strategy used to verify the error logic in the Alpha 21364 microprocessor. Traditional pre-silicon strategies of focused testing or unit-level random testing yield limited results in finding complex bugs in the error handling logic of a microprocessor. This paper introduces a technique to simulate error conditions and their recovery in a global environment using random test stimulus closely approximating traffic found in a real system. A significant number of bugs were found using this technique. A majority of these bugs could not be uncovered using a simple random environment, or were counter-intuitive to focused test design.

Original languageEnglish (US)
Pages (from-to)822-827
Number of pages6
JournalProceedings - Design Automation Conference
StatePublished - 2001
Event38th Design Automation Conference - Las Vegas, NV, United States
Duration: Jun 18 2001Jun 22 2001

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering


Dive into the research topics of 'Pre-silicon verification of the Alpha 21364 microprocessor error handling system'. Together they form a unique fingerprint.

Cite this