Power-profile driven variable voltage scaling for heterogeneous distributed real-time embedded systems

Jiong Luo, Niraj Kumar Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

38 Scopus citations

Abstract

Presents a power-aware real-time distributed embedded system scheduling algorithm. It tries to satisfy the hard real-time constraints and precedence relationships of the tasks in the distributed embedded system specification. At the same time, it performs variable voltage scaling by addressing variations in power consumption of different tasks and characteristics of different voltage-scalable processing elements (PEs) in an effective and efficient manner. It performs execution order optimization of scheduled events to increase the chances of scaling down voltages and frequencies of these voltage-scalable PEs in the distributed embedded system. It also performs power-profile and timing-constraint driven slack allocation to maximize power reduction via voltage scaling. This scheduling algorithm is also very effective in the case where the variations in power consumption of different tasks can be ignored. It can be included in the inner loop of a system-level synthesis tool for real-time heterogeneous embedded systems since it is very fast. It is superior to other approaches in the literature in terms of power consumption or complexity.

Original languageEnglish (US)
Title of host publicationProceedings - 16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design
PublisherIEEE Computer Society
Pages369-375
Number of pages7
ISBN (Electronic)0769518680
DOIs
StatePublished - Jan 1 2003
Event16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design - New Delhi, India
Duration: Jan 4 2003Jan 8 2003

Publication series

NameProceedings of the IEEE International Conference on VLSI Design
Volume2003-January
ISSN (Print)1063-9667

Other

Other16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design
CountryIndia
CityNew Delhi
Period1/4/031/8/03

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Keywords

  • Embedded system
  • Real time systems
  • Very large scale integration
  • Voltage

Fingerprint Dive into the research topics of 'Power-profile driven variable voltage scaling for heterogeneous distributed real-time embedded systems'. Together they form a unique fingerprint.

  • Cite this

    Luo, J., & Jha, N. K. (2003). Power-profile driven variable voltage scaling for heterogeneous distributed real-time embedded systems. In Proceedings - 16th International Conference on VLSI Design, VLSI 2003 - concurrently with the 2nd International Conference on Embedded Systems Design (pp. 369-375). [1183164] (Proceedings of the IEEE International Conference on VLSI Design; Vol. 2003-January). IEEE Computer Society. https://doi.org/10.1109/ICVD.2003.1183164