Power-performance modeling and tradeo analysis for a high end microprocessor

David Brooks, Margaret Martonosi, John David Wellman, Pradip Bose

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

We describe a new power-performance modeling toolkit, developed to aid in the evaluation and definition of future power-e cient, PowerPC™ processors. The base performance models in use in this project are: (a) a fast but cycle-accurate, parameterized research simulator and (b) a slower, pre-RTL reference model that models a specific high-end machine in full, latch-accurate detail. Energy characterizations are derived from real, circuit-level power simulation data. These are then combined to form higher-level energy models that are driven by microarchitecture-level parameters of interest. The overall methodology allows us to conduct power-performance tradeo studies in defining the follow-on design points within a given product family. We present a few experimental results to illustrate the kinds of tradeo s one can study using this tool.

Original languageEnglish (US)
Title of host publicationPower-Aware Computer Systems - 1st International Workshop, PACS 2000, Revised Papers
EditorsBabak Falsafi, T.N. Vijaykumar
PublisherSpringer Verlag
Pages126-136
Number of pages11
ISBN (Print)354042329X
DOIs
StatePublished - 2001
Event1st International Workshop on Power-Aware Computer Systems, PACS 2000 - Cambridge, United States
Duration: Nov 12 2000Nov 12 2000

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume2008
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other1st International Workshop on Power-Aware Computer Systems, PACS 2000
Country/TerritoryUnited States
CityCambridge
Period11/12/0011/12/00

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • General Computer Science

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