@inproceedings{92fd89f14325472584bd14f2adedf676,
title = "Power-driven design of router microarchitectures in on-chip networks",
abstract = "As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-chip communication. The tight delay requirements faced by on-chip networks have resulted in prior microarchitectures being largely performance-driven. While performance is a critical metric, on-chip networks are also extremely power-constrained. In this paper, we investigate on-chip network microarchitectures from a power-driven perspective. We first analyze the power dissipation of existing network microarchitectures, highlighting insights that prompt us to devise several power-efficient network microarchitectures: segmented crossbar, cut-through crossbar and write-through buffer. We also study and uncover the power saving potential of existing network architecture: express cube. These techniques are evaluated with synthetic as well as real chip multiprocessor traces, showing a reduction in network power of up to 44.9%, along with no degradation in network performance, and even improved latency-throughput in some cases.",
keywords = "Bandwidth, Fabrics, Intelligent networks, Microarchitecture, Network-on-a-chip, Power dissipation, Power system interconnection, System-on-a-chip, Telecommunication traffic, Traffic control",
author = "Hangsheng Wang and Peh, {Li Shiuan} and Sharad Malik",
note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; 36th International Symposium on Microarchitecture, MICRO 2003 ; Conference date: 03-12-2003 Through 05-12-2003",
year = "2003",
doi = "10.1109/MICRO.2003.1253187",
language = "English (US)",
series = "Proceedings of the Annual International Symposium on Microarchitecture, MICRO",
publisher = "IEEE Computer Society",
pages = "105--116",
booktitle = "Proceedings - 36th International Symposium on Microarchitecture, MICRO 2003",
address = "United States",
}