Abstract
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical component of the design specification of these systems. At present, however, power analysis tools can only be applied at the lower levels of the design - the circuit or gate level. It is either impractical or impossible to use the lower level tools to estimate the power cost of the software component of the system. This paper describes the first systematic attempt to model this power cost. A power analysis technique is developed that has been applied to two commercial microprocessors - Intel 486DX2 and Fujitsu SPARClite 934. This technique can be employed to evaluate the power cost of embedded software and also be used to search the design space in software power optimization.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 384-390 |
| Number of pages | 7 |
| Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| State | Published - 1994 |
| Event | Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design - San Jose, CA, USA Duration: Nov 6 1994 → Nov 10 1994 |
All Science Journal Classification (ASJC) codes
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering