Skip to main navigation Skip to search Skip to main content

Poster:Value-Aware Scheduler for Energy Reduction

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Optimizing energy consumption for computing workloads is a critical challenge, especially as we push the limits of high-performance systems within resource constraints. An underexplored approach to reducing energy costs is exploiting value locality: the tendency of instructions to process similar operand values during execution. Instruction operand values have abundant similarities within the reachable instruction window, a factor that existing architectures currently ignore. This paper introduces the broad concept of instruction-level, value-aware scheduling, an approach that leverages value locality in the hardware scheduler. By redirecting instructions of similar operand values to move together down the pipeline, the scheduler can reduce switching activity and dynamic energy usage. Such value-aware design philosophy, capable of adapting to a diverse range of workloads and architectures, has potential to be applied in broader architectural improvements.

Original languageEnglish (US)
Title of host publicationProceedings - 2025 34th International Conference on Parallel Architectures and Compilation Techniques, PACT 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages470-472
Number of pages3
ISBN (Electronic)9798331582951
DOIs
StatePublished - 2025
Externally publishedYes
Event34th International Conference on Parallel Architectures and Compilation Techniques, PACT 2025 - Irvine, United States
Duration: Nov 3 2025Nov 6 2025

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
ISSN (Print)1089-795X

Conference

Conference34th International Conference on Parallel Architectures and Compilation Techniques, PACT 2025
Country/TerritoryUnited States
CityIrvine
Period11/3/2511/6/25

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

Fingerprint

Dive into the research topics of 'Poster:Value-Aware Scheduler for Energy Reduction'. Together they form a unique fingerprint.

Cite this