Poster abstract: Dynamic multi-clock management for embedded systems

Holly Chiang, Amit Levy, Daniel Giffin, Philip Levis

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Modern microcontrollers come with a selection of clock sources that have widely differing frequencies and power consumptions. For applications whose workloads vary over time, dynamically changing the clock can provide significant energy savings. The varying constraints of embedded hardware environments and the complex interactions of mul-tiprogrammed systems makes this approach burdensome to do in application logic. Power Clocks orchestrates energy optimizing clock management in the kernel, obviating the need for application involvement while still achieving acceptable performance for typical workloads. This poster describes Power Clocks’s design and presents preliminary results.

Original languageEnglish (US)
Title of host publicationSenSys 2018 - Proceedings of the 16th Conference on Embedded Networked Sensor Systems
PublisherAssociation for Computing Machinery, Inc
Pages347-348
Number of pages2
ISBN (Electronic)9781450359528
DOIs
StatePublished - Nov 4 2018
Externally publishedYes
Event16th ACM Conference on Embedded Networked Sensor Systems, SENSYS 2018 - Shenzhen, China
Duration: Nov 4 2018Nov 7 2018

Publication series

NameSenSys 2018 - Proceedings of the 16th Conference on Embedded Networked Sensor Systems

Conference

Conference16th ACM Conference on Embedded Networked Sensor Systems, SENSYS 2018
CountryChina
CityShenzhen
Period11/4/1811/7/18

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Computer Networks and Communications

Keywords

  • Clock management
  • Power optimization

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