Abstract
A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multiple-port, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer.
Original language | English (US) |
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Pages | 87-96 |
Number of pages | 10 |
DOIs | |
State | Published - 1998 |
Event | Proceedings of the 1998 Eurographics/SIGGRAPH Workshop on Graphics Hardware - Lisbon, Portugal Duration: Aug 31 1998 → Sep 1 1998 |
Other
Other | Proceedings of the 1998 Eurographics/SIGGRAPH Workshop on Graphics Hardware |
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City | Lisbon, Portugal |
Period | 8/31/98 → 9/1/98 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Computer Science Applications