Optimal Choice of Intermediate Latching to Maximize Throughput in VLSI Circuits

Keyphrases

• VLSI Circuits 100%
• Signal Processing 100%
• Combinational Logic 100%
• Chip Area 100%
• Latency 50%
• Special Purpose 50%
• On chip 50%
• Processing Task 50%
• Clock Frequency 50%
• Computational Tasks 50%
• Parallel Circuit 50%
• FIR Filter 50%
• Signal Processing Applications 50%
• Bit-parallel 50%
• Circuit Parameters 50%
• Array multiplier 50%
• Mead 50%
• Clock Driver 50%
• Optimal Tradeoff 50%
• VLSI chips 50%

Computer Science

• Combinational Logic 100%
• Signal Processing 100%
• Special Purpose 50%
• Processing Task 50%
• Pipelining 50%
• Signal Processing Application 50%
• Computational Task 50%
• Intermediate Stage 50%
• Store Information 50%
• Parallel Circuit 50%