Abstract
A fault-tolerant model is developed for array processors. This model is used in analyzing the reliability of fully decoupled arrays. Other interconnection structures for constructing fault-tolerant arrays are investigated. It is found that the wavefront processing model offers advantages in achieving run-time tolerance.
Original language | English (US) |
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Title of host publication | Unknown Host Publication Title |
Publisher | IEEE |
Pages | 764-768 |
Number of pages | 5 |
ISBN (Print) | 0818606428 |
State | Published - 1985 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- General Engineering