Transistors with floating gate, used for nonvolatile memory, have a saturation current that increases with drain voltage. This is the result of undesirable capacitive coupling between the floating gate and the drain electrode, which can occur in devices made on crystalline silicon or amorphous silicon (a-Si) technologies. In this paper, we report on a new a-Si thin-film transistor memory structure that uses a high-defect-density interface in the gate insulator, instead of a floating gate, to trap charges. By reducing the ability of the trapped charge to laterally move in the device, this structure eliminates the drain-voltage dependence of the saturation current and the threshold voltage. The room-temperature data retention time is greater than ten years.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
- Amorphous silicon (a-Si)
- nonvolatile memory
- thin-film transistor (TFT)